This invention relates generally to multiprocessing systems, and in particular to synchronization of multiple processors and shared resources such as cache resources, computation resources or bus resources during exception handling by a machine check abort handling mechanism.
Shared resources comprising a hardware component such as a display device or a printer in multiprocessing systems have been managed through a variety of mechanisms. Some of these mechanisms entail the use of atomic primitives such as xe2x80x9ctest and setxe2x80x9d, xe2x80x9ccompare and swapxe2x80x9d, or xe2x80x9cload and reservexe2x80x9d to request access to the shared resource. At some system layer the details of such a mechanism and its primitives are specified.
These system level specifications define the resource sharing for a particular system and are not generally portable or scalable to another multiprocessing system without some additional modifications to the same system level specifications or to the specifications of some other system layers. In other words, management of such shared resources is not transparent to the system. Furthermore, for a multiprocessing system having multiple logical processing cores integrated into a single device, management of shared resources in a way that is transparent to the system has not previously been addressed.
Further complexities exist in error detection, correction and recovery for a multiprocessing system that has resources shared by multiple logical processing cores. A machine check abort (MCA) exception occurs in a processor when an error condition has arisen that requires corrective action. Lacking careful synchronization of the multiple logical processing cores and shared resources, damage or data corruption would potentially result. Handling MCA exception conditions in this type of a multiprocessing system has not previously been addressed.